1. Field of the Invention
The present invention relates to an integrated circuit technology and more particularly to an improved antifuse element suitable for use as a programmable element in a field-programmable gate array which is a gate array capable of being programmed in fields by a user.
2. Prior Art
The antifuse element is one of program elements used in a programmable memory and a programmable logic. Attention is being paid to such antifuse elements due to the fact that they have increasingly became to be used in the field of FPGA (Field-Programmable Gate Array). FPGA is one of PLDs (Programmable Logic Devices) in which a chip includes wirings formed therein to connect between functional blocks, each being a lump of basic logic circuits. A program element is adapted to select the connection between a functional block to be used and a wiring. Such a program element can be in the form of SRAM, EEPROM, fuse or antifuse. Among them, the antifuse system is more advantageous in that it is suitable for large capacities since the program element thereof can be reduced to a size smaller than the other program elements. Another advantage of the antifuse system is that it is suitably used to increase the speed of a device since the connection resistance thereof can be reduced. FIG. 15 shows an antifuse element constructed in accordance with the prior art. The antifuse element comprises a first metal electrode 11, a second metal electrode 13 spaced apart from the first metal electrode 11, a connecting hole 15 formed in insulating layer 14 to extend from the second metal electrode 13 therethrough to the first metal electrode 11, and a dielectric film 16 formed in the connecting hole 15 to insulate between the first and second metal electrodes 11, 13.
When a voltage is applied between the first and second metal electrodes 11, 13, the dielectric film 16 in the connecting hole 15 may be broken down by such a voltage (at an area shown by Q in FIG. 15). The voltage creating such a dielectric breakdown is known as write voltage or program voltage (which will be referred to as "write voltage V.sub.p " herein). When such a write voltage is applied to the antifuse element, the connection is made between the metal electrodes.
An FPGA includes a plurality of such antifuse elements. By selectively dielectric breaking some connecting holes in the antifuse elements, a desired program can be provided. More particularly, in such FPGA wirings, the writing voltage is selectively applied to the respective connecting holes to create the dielectric breakdown in the dielectric film, resulting in continuity of the desired wiring.
Dielectric materials which have been used to form antifuse elements include single-layer films of S.sub.i O.sub.2, Si.sub.3 O.sub.4, Al.sub.2 O.sub.3 and the like, a laminated film consisting of silicon oxide film and silicon nitride film, amorphous S.sub.i, transition metal's oxide and so on.
The dielectric film of the antifuse element must be broken down by a given voltage, but should not be broken down by a voltage equal to or lower than a predetermined level, for example, by the operational voltage of a device. However, the dielectric films of S.sub.i O.sub.2, Si.sub.3 O.sub.4 or the like used by the prior art tend to be broken down due to a local concentration of electric field that is produced by a protrusion formed on the surface of the metal electrode when the dielectric film is formed as a thin film. Such a problem becomes more marked when the dielectric film is formed as a thin film depending on the current tendency of increasingly reducing the operational voltage of the device. When the operational voltage of the device is reduced, the write voltage V.sub.p of the antifuse element must also be correspondingly reduced. To reduce the write voltage V.sub.p, the thickness of the dielectric film is also required to be reduced. This causes the irregularity of the metal electrode surface to have a greater influence on the dielectric film. Thus, the antifuse element may be accidentally broken down by the operational voltage of a device which does not intend the dielectric breakdown with reduction of the operational voltage. This will adversely affect the reliability of the antifuse element.
As the antifuse element is miniaturized to increase the aspect ratio of the connection hole, it becomes difficult to form a uniform dielectric film. Particularly if dielectric films are formed by CVD having a good step coverage, it is difficult to deposit dielectric films having a good film property at a reduced temperature. This creates protrusions on the surface of the metal electrode when the dielectric film is deposited. The protrusions will degrade the insulating characteristics in the antifuse element. A method which can form a good film at a reduced temperature is reactive sputter. However, these methods do not provide a good step coverage in the film.
In view of the aforementioned problems in the prior art, it is an object of the present invention to provide an antifuse element having an improved reliability which is suitable for use as FPGA program element responsive to an reduced operational voltage.
More particularly, an object of the present invention is to provide an antifuse film which can be broken down by a reduced write voltage V.sub.p.
Another object of the present invention is to reduce the variance of the dielectric breakdown due to the local concentration of electric field so as to increase the reliability.
Still another object of the present invention is to lower the connection resistance of a program element so as to increase the speed of a device.